ICCD 2003  Conference Schedule At-a-Glance

Sunday, October 12

In conjunction with ICCD 2003: 

Conference Workshop :  Low-Power Circuit and System Design

Monday, October 13

9:00-9:30	Opening Remarks and Welcome
9:30-10:15	Keynote Address Professor Mark Horowitz, Stanford University "High-Speed Link Design :  Then and Now"
10:15-11:00	Keynote Address Dr. William Pulleyblank, IBM Corporation "Terascale Computing and BlueGene"
11:00-11:45	Keynote Address Ted Vucurevich, Cadence Design Systems "Advanced EDA Tools for High-Performance Design"
11:45-1:00	Lunch, sponsored by Intel Corporation
1:00-3:00	Session 1.1 Energy Efficiency	Session 1.2 Timing Verification	Session 1.3 Electrical Analysis for System LSI
3:00-3:30	Break
3:30-5:30	Session 2.1 Power Optimization	Session 2.2 Gene Chip Design (special session)	Session 2.3  System Level Design

Tuesday, October 14
 

9:00-10:30	Session 3.1 Systems Performance	Session 3.2 uP Test & Diagnosis	Session 3.3 Physical Design
10:30-11:00	Break
11:00-12:30	Session 4.1 Performance Optimization	Session 4.2 Clock & Signal Distribution	Session 4.3 Performance and Power-Driven Physical Design
12:30-1:30	Lunch
1:30-3:30	Session 5.1 Instruction Execution	Session 5.2 Test Compression Technology (invited session)	Session 5.3 Physical Design for Regular Fabrics and FPGA's
3:30-4:00	Break
4:00-5:30	Session 6.1 Array Design Optimization	Session 6.2 Test Compaction	Session 6.3 Techniques for Synthesizing into Fabrics (invited session)
7:00-9:00	Conference Dinner Bella Mia Restaurant, Downtown San Jose

Wednesday, October 15
 

9:00-10:30	Session 7.1 Hardware Partitioning	Session 7.2 Energy-Aware Design and Application	Session 7.3 High-Speed Design Issues and Test Challenges (invited session)
10:30-11:00	Break
11:00-12:30	Session 8.1 Efficiency & Reliability	Session 8.2 Novel Methods in Logic Synthesis
12:30-1:30	Lunch
1:30-3:00	Session 9.1 Communications & Context Management	Session 9.2 Board Test and Power-Aware Test